Skip to content

Remembering States

  • We want to remember one bit of information from time t1 to be used in t
  • End of one time bit, there're two states: Remembering 0 or 1

Flip-Flops are gates that can flip between these two states

  • Data are internal state rather than just immediate inputs or outputs

The Clocked Data Flip Flop (DFF)

  • In this course the negated output port Q is not used
out[t]=in[t1]

Implementation of DFF

Primitive to this course

In physical implementation, DFFs can be built from actual gates:

  1. Create a "loop" achieveing an "un-clocked" flip-flop
  2. Isolation accross tims steps using a "master-slave" setup
Note

A cycle in the hardware connection in HardwareSimulator is only allowed if it passes through a sequential gate

Sequential Logic With DFF

1-Bit Register

Remember an input bit until requested to load a new value.

if load(t-1) 
then out(t) = in(t-1)
else out(t) = out(t-1)

Implementation

The selection between whether to output out(t-1) or in(t-1) behaves exactly as MUX chip